Frequency synthesizers are widely used for producing output signals of specified frequencies. A typical implementation uses a phase lock loop (PLL) to generate a specific output frequency F.sub.OUT from a reference input frequency F.sub.IN. This type of loop is sometimes called an indirect frequency synthesizer and generally includes a phase detector (PD) whose output drives a voltage controlled oscillator (VCO) which produces the output signal F.sub.OUT. A first input F1 to the phase detector is derived from a prescale frequency divider (divisor=N) driven by the reference frequency input F.sub.IN. A second input F2 to the phase detector is derived from a feedback frequency divider (divisor=M) driven by the output F.sub.OUT. The phase detector generates an output proportional to the phase difference between the two inputs. When the loop is locked, the two inputs are identical in frequency and phase, and the phase detector output is constant; i.e. F1=F2 and F.sub.OUT =F.sub.IN (M/N).
U.S. Pat. No. 4,234,929 entitled Control Device for a Phase Lock Loop Vernier Frequency Synthesizer describes a device utilizing two simple phase lock loops. Each loop produces a frequency equal to N.times.f.sub.ref (where f.sub.ref is respectively shown as f1 and f2). The overall vernier synthesizer produces an output frequency that can be varies in steps of f1-f2.